MANUAL CONTROLS

The mnemonic codes and addresses for the standard equipment are:Read Paper Tape Alphanumeric Moderpa Address 1Read Paper Tape Binary Moderpb Address 2Typewriter Outputtyo Address 3Typewriter Inputtyi Address 4Punch Paper Tape Alphanumeric Modeppa Address 5Punch Paper Tape Binary Modeppb Address 6

The mnemonic codes and addresses for the standard equipment are:

Read Paper Tape Alphanumeric Moderpa Address 1Read Paper Tape Binary Moderpb Address 2Typewriter Outputtyo Address 3Typewriter Inputtyi Address 4Punch Paper Tape Alphanumeric Modeppa Address 5Punch Paper Tape Binary Modeppb Address 6

The Console of PDP-3 has controls and indicators for the use of the operator. Fig. 4 is a close-up of the control panel of PDP-1, the 18 bit version of PDP-3. All computer flip-flops have indicator lights on the Console. These indicators are primarily for use when the machine has stopped or when the machine is being operated one step at a time. While the machine is running, the brightness of an indicator bears some relationship to the relative duty factor of that particular flip-flop.

Three registers of toggle switches are available on the Console. These are the Test Address (15 bits), the Test Word (36 bits), and the SenseSwitches(6 bits). The first two are used in conjunction with the operating push buttons. The Sense Switches are present for manual intervention. The use of these switches is determined by the program (seeSystem Block DiagramandSkip Group Instructions).

Start— When this switch is operated, the computer will start. The first instruction comes from the memory location indicated in the Test Address Switches.Stop— The computer will come to a halt at the completion of the current memory cycle.Continue— The computer will resume operation starting at the state indicated by the lights.Examine— The contents of the memory register indicated in the Test Address will be displayed in the Accumulator and the Memory Buffer lights.Deposit— The word selected by the Test Word Switches will be put in the memory location indicated by the Test Address Switches.Read-In— When this switch is operated, the photoelectric paper tape reader will start operating in the Read-In mode. (seeInput-Output).

Start— When this switch is operated, the computer will start. The first instruction comes from the memory location indicated in the Test Address Switches.

Stop— The computer will come to a halt at the completion of the current memory cycle.

Continue— The computer will resume operation starting at the state indicated by the lights.

Examine— The contents of the memory register indicated in the Test Address will be displayed in the Accumulator and the Memory Buffer lights.

Deposit— The word selected by the Test Word Switches will be put in the memory location indicated by the Test Address Switches.

Read-In— When this switch is operated, the photoelectric paper tape reader will start operating in the Read-In mode. (seeInput-Output).

In addition to the operating push buttons, there are several separate toggle switches.

Single Cycle Switch— When the Single Cycle Switch is on, the computer will halt at the completion of each memorycycle.This switch is particularly useful in debugging programs. Repeated operation of the Continue Switch button will step the program one cycle at a time. The programmer is thus able to examine the machine states at each step.Test Switch— When the Test Switch is on, the computer will perform the instruction indicated in the Test Address location. It will repeat this instruction either at the normal speed rate or at a single cycle rate if the Single Cycle Switch is up. This switch is primarily useful for maintenance purposes.Sense Switches— There are six switches on the Console which are present for manual intervention.

Test Switch— When the Test Switch is on, the computer will perform the instruction indicated in the Test Address location. It will repeat this instruction either at the normal speed rate or at a single cycle rate if the Single Cycle Switch is up. This switch is primarily useful for maintenance purposes.

Sense Switches— There are six switches on the Console which are present for manual intervention.

The internal Memory System for PDP-3 consists of modules of 4096 words of coincident current magnetic core storage. Each word has 36 bits. The memory modules operate with a read-rewrite cycle time of 5 microseconds. The driving currents of the memory are automatically adjusted to compensate for normal room temperature variations.

Each core memory module consists of the memory stack, the required X and Y switches, the X and Y current sources and sense amplifiers for that stack.

The Memory Address Register, the Memory Buffer Register, and the Memory Timing Controls are considered to be part of the Central Processor. The standard PDP-3 Memory Address Register configuration is built to allow up to 8 modules of core memory (32,768 words). There is a space in the addressing section of the machine to allow expansion of the addressing by a factor of eight for a total addressing capacity of 262,144 memory registers.

The Core Memory may be supplemented by Magnetic Tape Storage. This is described under Input-Output.

The PDP-3 is designed to accommodate a variety of input-output equipment. Standard input-output units include a Paper Tape Reader, Paper Tape Punch and an Electric Typewriter.

A single instruction, In-Out Transfer (seeCentral Processor), performs all in-out operations through the 36 bit In-Out Register. The address portion of this instruction specifies the in-out function. One bit of the instruction selects an in-out halt as required.

The Paper Tape Reader of the PDP-3 is a photoelectric device capable of reading 300 lines per second. Six lines form the standard 36 bit word when reading binary punched eight hole tape. Five, six and seven hole tape may also be read.

The reader will operate in one of two basic modes or in a third special mode.

Alphanumeric Moderpaiot 1In this mode, one line of tape is read for each In-Out Transfer. All eight holes of the line are read. The information is left in the right eight bits of the In-Out Register, the remainder of the register being left clear. The standard PDP alphanumeric paper tape code includes an odd parity bit which may be checked by the program. Tape of non-standard width would be read in this mode.Binary Moderpbiot 2For each In-Out Transfer instruction, six lines of paper tape are read and assembled in the In-Out Register to form a full computer word. For a line to be recognized in this mode, the eighth hole must be punched; i.e., lines with no eighth hole will be skipped over. The seventh hole is ignored. The pattern of holes in the binary tape is arranged so as to be easily interpreted visually in terms of machine instruction.Read-In ModeThis is a special mode activated by the "Read-In" Switch on the Console. It provides a means of entering programs which neither rely on read-in programs in memory nor require a plug board. Pushing the "Read-In" Switch starts the reader in the binary mode. The first group of six lines and alternate succeeding groups of six lines are interpreted as "Read-In" mode instructions. Even-numbered groups of 6 lines are data. The "Read-In" mode instructions must be either "deposit in-out" (dio Y) or "jump" (jmp Y). If the instruction is dio Y, the next group of six binary lines will be stored in memory location Y and the reader continues moving. If the instruction is jmp Y, the "Read-In" mode is terminated and the computer will commence operation at the address of the jump instruction.

Alphanumeric Moderpaiot 1

In this mode, one line of tape is read for each In-Out Transfer. All eight holes of the line are read. The information is left in the right eight bits of the In-Out Register, the remainder of the register being left clear. The standard PDP alphanumeric paper tape code includes an odd parity bit which may be checked by the program. Tape of non-standard width would be read in this mode.

Binary Moderpbiot 2

For each In-Out Transfer instruction, six lines of paper tape are read and assembled in the In-Out Register to form a full computer word. For a line to be recognized in this mode, the eighth hole must be punched; i.e., lines with no eighth hole will be skipped over. The seventh hole is ignored. The pattern of holes in the binary tape is arranged so as to be easily interpreted visually in terms of machine instruction.

Read-In Mode

This is a special mode activated by the "Read-In" Switch on the Console. It provides a means of entering programs which neither rely on read-in programs in memory nor require a plug board. Pushing the "Read-In" Switch starts the reader in the binary mode. The first group of six lines and alternate succeeding groups of six lines are interpreted as "Read-In" mode instructions. Even-numbered groups of 6 lines are data. The "Read-In" mode instructions must be either "deposit in-out" (dio Y) or "jump" (jmp Y). If the instruction is dio Y, the next group of six binary lines will be stored in memory location Y and the reader continues moving. If the instruction is jmp Y, the "Read-In" mode is terminated and the computer will commence operation at the address of the jump instruction.

The standard PDP-3 Paper Tape Punch has a nominal speed of 20 lines per second. It can operate in either the alphanumeric mode or the binary mode.

Alphanumeric Modeppaiot 5For each In-Out Transfer instruction one line of tape is punched. In-Out Register bit 35 conditions hole #1. Bit 34 conditions hole #2, etc. Bit 28 conditions hole #8.Binary Modeppbiot 6For each In-Out Transfer instruction one line of tape is punched. In-Out Register bit five conditions hole #1. Bit four conditions hole #2, etc. Bit zero conditions hole #6. Hole #7 is left blank. The #8 hole is always punched in this mode.

Alphanumeric Modeppaiot 5

For each In-Out Transfer instruction one line of tape is punched. In-Out Register bit 35 conditions hole #1. Bit 34 conditions hole #2, etc. Bit 28 conditions hole #8.

Binary Modeppbiot 6

For each In-Out Transfer instruction one line of tape is punched. In-Out Register bit five conditions hole #1. Bit four conditions hole #2, etc. Bit zero conditions hole #6. Hole #7 is left blank. The #8 hole is always punched in this mode.

The Typewriter will operate in the input mode or the output mode.

Output Modetyoiot 3For each In-Out Transfer instruction one character is typed. The character is specified by the right six bits of the In-Out Register.Input Modetyiiot 4This operation is completely asynchronous and is therefore handled differently than any of the preceding in-out operations.When a Typewriter key is struck, Program Flag Number One is set. At the same time the code for the struck key is presented to gates connected to the right six bits of the In-Out Register. This information will remain at the gate for a relatively long time by virtue of the slow mechanical action. A program designed to accept typed-in data would periodically check the status of Program Flag One. If at any time Program Flag One is found to be set, an In-Out Transfer instruction with address four must be executed for information to be transferred. This In-Out Transfer normally should not use the optional in-out halt. The information contained in the Typewriter's coder is then read into the right six bits of the In-Out Register.

Output Modetyoiot 3

For each In-Out Transfer instruction one character is typed. The character is specified by the right six bits of the In-Out Register.

Input Modetyiiot 4

This operation is completely asynchronous and is therefore handled differently than any of the preceding in-out operations.

When a Typewriter key is struck, Program Flag Number One is set. At the same time the code for the struck key is presented to gates connected to the right six bits of the In-Out Register. This information will remain at the gate for a relatively long time by virtue of the slow mechanical action. A program designed to accept typed-in data would periodically check the status of Program Flag One. If at any time Program Flag One is found to be set, an In-Out Transfer instruction with address four must be executed for information to be transferred. This In-Out Transfer normally should not use the optional in-out halt. The information contained in the Typewriter's coder is then read into the right six bits of the In-Out Register.

The PDP-3 is designed to accommodate a variety of input-output equipment. Of particular interest is the ease with which new, and perhaps unusual, external equipment can be added to the machine. Optional in-out devices include Cathode Ray Tube Display, Magnetic Tape, Real Time Clock, Line Printer and Analog to Digital Converters. The method of operation of PDP-3 with these optional devices is similar to the standard input-output equipment.

An optional in-out control is available for PDP-3. This control, termed the Sequence Break System, allows concurrent operation of several in-out devices and the main sequence. The system has, nominally, 16 automatic interrupt channels arranged in a priority chain.

A break to a particular sequence may be initiated by the completion of an in-out device, the program, or an external signal. If this sequence has priority, the C(AC), C(IO), C(PC), and C(IA) are stored in three fixed memory locations unique to that sequence. Since the C(PC) and C(IA) are eighteen bits each, these two registers are stored in one memory location. The next instruction is taken from a fourth location. This instruction is usually a jump to a suitable routine. The program is now operating in the new sequence. This new sequence may be broken by a higher priority sequence. A typical program loop for handling an in-out sequence would contain 3 to 5 instructions, including the appropriate iot. These are followed by load AD and load IO from the fixed locations and a special indirect jump through the location of the previous C(PC). This special jump also loads the IA. This last instruction terminates the sequence.

The device connected to an in-out channel communicates directly with memory through the Memory Buffer Register. At the completion of each machine instruction, a check is made to see if the in-out channel has a word for, or needs a word from, the memory. When necessary, a memory cycle is taken to serve the channel. The operation is initiated by an in-out command. The in-out transfer command indicates the nature of the transfer. The left half ofthe In-Out Register must contain the starting address of the transfer, and the right half must contain the number of words to be transferred. If the Sequence Break System is connected, the completion of the transfer will signal the proper sequence. If no Sequence Break System is connected, the completion of the in-out channel transfer sets a program flag.

The system consists of tape units connected to the PDP-3 through a tape control (TC). This tape is read or written in IBM 729I format. Two hundred characters, each having 6 bits plus a parity bit, are written on each inch of tape and the tape moves at 75 inches/sec. The tape control has the job of connecting a specific unit to the PDP-3 and is a switch. It also has the function of controlling the format of information that is read or written on tape. In-out class commands instruct TC to the type of information transfer and select the tape unit. Another IOT command synchronizes the transfer of information through the TC to the computer.

The IOT order to select the unit and function is decoded as follows: 1) Three bits specify the function of TC. 2) The remaining 6 bits select the unit.

IOT Motion Commands for Magnetic Tape Units

Where the octal digits, nn, specify the unit number.

The motion commands have the deferred bit, thus, the program halts. If the TC is free, the command will be transferred to the tape control for action and the program restarts immediately. If the tape control is currently busy with an instruction, i.e., it hasn't finished a previous command, the motion command is held up until TC is free to execute the new command.

The transfer of information from the computer to the TC is accomplished with the pause and skip command, MPS or IOT 70. This command has the deferred bit and halts a program until the TC can handle the transfer. On completion, the transfer occurs and the program restarts. This is used exclusively to synchronize the flow of information between a tape unit and the computer. This command normally skips the following instruction. If a flag is set in the TC, indicating incorrect information flow, the skip does not take place.

The TC contains a 36 bit buffer which holds a complete word while information is read or written. When an MPS order is given and the unit is reading, the TC buffer is read into the IO. The MPS order given during writing causes the IO to be transferred to the TC buffer.

Various conditions occurring in the TC cause the no-skip condition, when an MPS is given. Tape control flags are examined by the command, examine and clear flags, MEC or IOT 71. When MEC is given, the flags are put into the IO for program interrogation, and the flags cleared. The flags are: parity, end of tape, an end of record flag, and reading-writing check.

The parity flag is set if the parity condition is not met while the tape is being read (during MWA, MWB, MRA, or MRB).

The end of tape flag is set when the tape comes to the end of tape, moving in either direction.

Three conditions set the read-write check flag: 1) If TC is inactive, i.e., no unit or function selected, and an MPS instruction is given. The MPS becomes a no-operation, no-halt instruction. 2) When reading information and not emptying the TC buffer, by giving an MPS before more information arrives from tape. 3) A unit becomes unavailable during a normal sequence.

The end of record flag is set during reading or backspacing when thetapecomes to an end of record gap.

Writing a Record of Information

Information is written on the tape by giving a MWB or MWA command. This sets a write binary or a write alphanumeric into the TC andselects the unit. A motion select command is executed immediately if the TC is free, otherwise, the command waits until it can be executed. Normal programming can continue after the MWA or MWB is given for approximately 5 milliseconds. At this time, an MPS order is given and the program pauses until information can be written. When the MPS is restarted, information is transferred to the TC buffer from the IO. If no flags have been set, the following instruction is skipped.

Three-quarter inches of blank tape is written by giving either the MWA or MWB order. An end of file is written as follows: 1) Four MWA commands write three inches of blank tape. 2) Then end of file character is written by giving the MPS order.

Information is read and checked for correct parity while writing.

If too many program steps are given between the motion select command, MWA or MWB and the first MPS, the unit willdeselect(or disconnect). The MPS is then a no-operation command.

Writing Program

As an example, a program to write k words in binary format from storage beginning in register A, using tape unit number 04, is shown. The following program is written in standard FRAP language. The program begins in register enterwrite.

Reading Information

Information is read by giving the MRA or MRB order. Almost 10 ms. is available after a read order is given before information actually enters the TC buffer.

To read a record of unknown length, the read order is first given. The MPS order halts the program until six characters are assembled in the TC information buffer. The next instruction after the MPS, a jump instruction, transfers control from the loop when any flag is set. The next instruction deposits the IO. The record length is determined by not skipping after the MPS order on the setting of the end of record flag. The read-write check flag or the end of record flag is then interrogated to see that the tape is actually at the end of record. If a tape is not at the end of record, then the tape is either at the end of the reel, or a parity check has occurred.

Reading Program

Program to read j binary words into storage beginning in register d, using tape unit 10, j is unknown. The program begins in register enteread.

Forward Spacing

Forward spacing is done by giving an MRB or MRA order. This moves the tape forward with the read-write head positioned at the end of the following record. If n read orders are given, the tape is spaced forward n records. By giving the MEC order, parity flags are examined to see that information on tape has been read correctly.

Backspacing

By giving an MBA or MBB order the tape is moved backwards a record with the read-write heads positioned in the previous end of record gap. The end of record flag is set when the tape has moved backwards a record.

Rewinding

Rewinding is accomplished by giving the rewind order, move tape to load point, MLP. The rewind order starts a unit rewinding and does not tie up the TC. If a motion command is given which calls for a unit that is rewinding, the command is executed, but the action will not take place until the unit is available.

Unit Availability

A unit is unavailable to the program under the following conditions:

A selected but unavailable unit holds up the TC if a motion order is given for the unit. The TC will be held up until the unit is ready.

Flag Positions

Connection with High Speed Channel

The high speed channel directs the tape control, and word transfer, just as a program would. A unit is first started reading or writing. The high speed channel is given the memory location of the information, and the number of registers the words read or written will occupy. The channel effects the information transfer. Thus, a high speed channel connected to a tape control handles the programming for the unit word transfers.

Completion of the block transfer is signified by either setting a program flag, or entering the sequence break.

Connection with Sequence Break System

When the TC is connected to the Sequence Break System, the program is automatically interrupted each time an MPS command needs to be given.

Programming is unaffected during reading and a record may be read with no flags set. The TC initiates breaks so that an MPS may be given in time.

Similarly, the break is initiated during writing each time an MPS needs to be given.

Motion Command Summary

The PDP-3 Cathode Ray Tube Display is useful for presentation of graphical or tabular information to the operator. It uses a 16 inch round tube with magnetic deflection. For each In-Out transfer order, one point is displayed at the position indicated by the In-Out Register. Bits 0-9 of the IO indicate the X coordinate of the position, and bits 18-27 indicate the Y coordinate. The display takes 60 microseconds.

An additional display option is a Light Pen. By use of this device the computer is signaled that the operator is interested in the last point displayed. Thus the program can take appropriate action such as changing the display or shifting operation to another program.

A smaller display is available. This display uses a five inch, high resolution cathode ray tube. The tube is equipped with a mounting bezel to accept a camera or photomultiplier device. The operation of this display is similar to that of the 16 inch, except that 12 bits are decoded for each axis.

A special input register may be connected to operate as a Real Time Clock. This is a counting register operated by a crystal controlled oscillator. The clock can be reset to zero by manual operation. A toggle switch interlock prevents an accidental reset. The state of this counter may be read at any time by the appropriate In-Out Transfer instruction.

A 72 column Anelex printer and control are available as an option for PDP-3. The control contains a one line buffer. This buffer is cleared by the completion of an order to space the paper one position (psp). The buffer is filled from the In-Out Register by a succession of 12 load buffer orders (plb). The first plb will put the six characters represented by C(IO) in the leading (left-hand) column positions of the buffer. After the buffer is loaded, the order, print (pnt), is given.

An assembler or compilerpreparesa machine language tape suitable for direct interpretation by the computer from a program tape in operator language. Generally speaking, one statement accepted by FRAP produces one instruction for the machine. A single statement written for the PDP-3 compiler, DECAL-3, may cause several instructions to be written. Thus, FRAP causes a 1 for 1 mapping of instructions for statements while DECAL may produce many instructions from one statement.

In addition to allowing program tapes to be prepared with off line equipment, an assembly program has other functions. Normally, the machine would require 36 bits or 12 octal digits to be written for each instruction used in the machine. FRAP allows mnemonic symbols to be used for the instructions. These mnemonic symbols aid the programmer by representing the instruction in an easily remembered form.

In addition to allowing mnemonic symbols to represent the instructions, variable length sequences of alphanumeric characters may be used to represent memory addresses in symbolic form. The assembly program does the address bookkeeping for the programmer. A short example of a FRAP program is onPage 29.

Since few characters limit or control the format of instructions written in FRAP-3 language, it is possible to write instructions in almost any format or style.

FRAP-3 may also be used to prepare tapes for interpretive programming, since arbitrary definitions for operation code symbols are permitted.

A feature useful both for ease of programming and for machine simulation is the ability to call for a series of instructions (macro-instruction) to be written. Frequently used instructionsequencesthus need only to be defined once.

DECAL-3 (Digital Equipment Compiler, Assembler, and Linking loader for PDP-3) is an integrated programming system for PDP-3. Itincorporates in one system all of the essential features of advanced assemblers, compilers, and loaders.

DECAL is both an assembler and compiler. It combines the one-to-one translation facilities of an assembler, and the one-to-many translation facilities of a formula translation compiler. Problem oriented language statements may be freely intermixed with symbolic machine language instructions. A flexible loader is available to allow the specification of program location at load time. The programmer may specify that certain variables and constants are "systems" variables and constants. The symbols so defined are universally used in a system of many routines. Thus, communications between parts of a major program is facilitated even though these parts may be compiled separately. Storage requirements for a large program are lessened by this technique.

DECAL is an open-ended programming system and can be modified without a detailed understanding of the internal operation. This is achieved by means of a recursive definition facility based on a skeleton compiler with a small set of logical capabilities. The skeleton compiler acts as a bootstrap for introducing more sophisticated facilities.

The compiler will be delivered with a fully defined subset of formula translation operators. Additional subsets may be defined by the user to best fit his source language.

A set of subroutines are provided with the PDP-3 to perform floating point arithmetic. In these, the PDP-3 36 bit word is divided to form a 27 bit mantissa, a, and 9 bit exponent, b. Numbers, thus, appear in the form:k = ax2bwhere, a, is considered to be in fractional form in the range½ ≤ a < 1,and b is an integer,0 ≤ b < 29.This gives number, k, the range10-76< k < 10+76.

The subroutines are called with one operand in the accumulator. After the subroutine has been executed, the accumulator contains the answer. Thus floating point numbers are essentially handled as regular logical works. The format of the number allows magnitude comparisons to be made by conventional arithmetic as bit 0 is the sign of the number, bits 1 to 9 the exponent, and the remaining 26 bits, together with the sign bit, the mantissa inones complement arithmetic. The arithmetic subroutines are: add, subtract, multiply, divide, convert a floating point number to binary, convert a binary number to a floating number. Additional routines form: √x, ex, ln x, sine(π⁄2)x, cos(π⁄2)x, tan-1x. There are also programs to convert between floating decimal numbers and PDP-3 floating numbers.

Routineswhich require two operands, e.g., add, subtract, multiply and divide, require an index register to specify the address of the second operand. An index register also specifies parameters in data conversions, e.g., the position of the binary point when converting a binary number to a standard floating number.

Using the floating point subroutines, additional routines may be written which handle complex floating numbers and vector and matrix algebra.

Maintenance Routines are used exclusively to check the operation of the machine. These routines are operated while varying the bias supply voltages, and thus a check is made on possible degradation of all components which would affect the operation of the machine.

A variety of additional programs are provided with PDP-3.

One of the more important programs is the Typewriter Interrogator Program (TIP). TIP allows the typewriter to be used most effectively as an input-output link by which programs and data are examined and modified. The features include request for printing of a series of registers, interrogation and modification of the contents of registers, and the ability to request new tapes after programs have been suitably modified. Communication is done completely via the typewriter in either octal numbers, decimal numbers, or alphanumeric codes. Register contents are presented in similar form.

Other miscellaneous routines handle arithmetic processes, e.g., number conversions, and communication with the input or output devices. These routines include various format print outs, paper tape and magnetic tape read in programs, and display subroutines.

SYSTEM BLOCK DIAGRAMFIGURE 1

INSTRUCTION FORMATFIGURE 2

FIGURE 3

Transcriber's NotesFigure 4 is referred to in the text, but a copy could not be located.C (X) and C(X) standardized to C(X).Other changes from the original text arehighlighted.

Transcriber's Notes

Figure 4 is referred to in the text, but a copy could not be located.C (X) and C(X) standardized to C(X).Other changes from the original text arehighlighted.

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